Sisyphus repository
Last update: 2018-10-20 23:10:32 +0400 | SRPMs: 18821 | Sign in or Sign up
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Sisyphus: 20180617.0.g28a1307-alt1

Group :: Engineering
Source RPM: alanmi-abc

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Current version: 20180617.0.g28a1307-alt1
Built: 4 months ago
Size: 3.42 MB
Repocop status: ok

Home page:

License: BSD-style
Summary: System for Sequential Logic Synthesis and Formal Verification

ABC is a growing software system for synthesis and verification of binary
sequential logic circuits appearing in synchronous hardware designs. ABC
combines scalable logic optimization based on And-Inverter Graphs (AIGs),
optimal-delay DAG-based technology mapping for look-up tables and standard
cells, and innovative algorithms for sequential synthesis and verification.

ABC provides an experimental implementation of these algorithms and a
programming environment for building similar applications. Future development
will focus on improving the algorithms and making most of the packages
stand-alone. This will allow the user to customize ABC for their needs as if it
were a tool-box rather than a complete tool.

Current maintainer: Elvira Khabirova

List of contributors: ACL: List of rpms provided by this srpm:
  • alanmi-abc
  • alanmi-abc-debuginfo
Recent changes (last three changelog entries):

2018-06-19 Elvira Khabirova <lineprinter at> 20180617.0.g28a1307-alt1

    - New version
    - Upstream moved to github

2017-02-10 Elvira Khabirova <lineprinter at> 20160717.196.5d42a91ef6fb-alt1

    - Initial build

© 2009–2018 Igor Zubkov