Package ripes-VSRTL: Information
Binary package: ripes-VSRTL
Version: 2.2.6-alt1
Architecture: aarch64
Build time: May 9, 2024, 10:58 PM in the task #347758
Source package: ripes
Category: Sciences/Computer science
Report package bugDownload: ripes-VSRTL-2.2.6-alt1.aarch64.rpm
Home page: https://github.com/mortbopet/Ripes
License: MIT
Summary: Visual Simulation of Register Transfer Logic (Ripes version)
Description:
VSRTL is a framework for describing, visualizing and simulating digital circuits. A VSRTL-described circuit may be built and simulated as a standalone application or embedded within a Qt-based C++ application. As an example, VSRTL is used as the simulation and visualization framework for Ripes, a graphical processor simulator and assembly editor for the RISC-V ISA.
Maintainer: George V. Kouryachy
Last changed
May 9, 2024 George V. Kouryachy 2.2.6-alt1
- Autobuild version bump to 2.2.6 - Separate embedded VSRTL binary
March 8, 2024 Alexey Sheplyakov 2.1.0-alt2
- NMU: trimmed build dependencies according to CMakeLists.txt (only QtCore, QtWidgets, QtCharts, and QtSvg are required). Fixes FTBFS on LoongArch.
Aug. 3, 2021 Michael Shigorin 2.1.0-alt1.1.1
- E2K: avoid qt5-{webengine,webview} as missing
- minor spec cleanup